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emSSL V2 - The SSL/TLS solution for single-chip systems
emSSL V2 – The SSL/TLS solution for single-chip systems
Hilden, Germany – June 23 rd , 2015
SEGGER is releasing a new version of its emSSL secure sockets implementation with both client and server capability.
The minimized RAM usage allows operation on single-chip systems. A secure connection between browser and the webserver supported by emSSL requires only 7KB of RAM.
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C-STAT & C-RUN WebEX demonstration
As requested by a number of interested customers in the Benelux we have planned a WebEX session of these interesting code verification tools by the IAR Systems product specialist on June 25th.
We will send out an e-mail with an invitation shortly, however you can already register by sending an e-mail to info@indes.com.
You will then receive an e-mail with the time and link to join the session. ... |
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IAR C-STAT code analysis now also released for Atmel 8-bit AVR
IAR Systems adds static code analysis to leading development tools for Atmel 8-bit AVR family New version of IAR Embedded Workbench for AVR introduces static code analysis and stack usage analysis.
June 2, 2015—IAR Systems® presents version 6.60 of its development tools IAR Embedded Workbench® for AVR. The update extends code analysis possibilities with the integration of static ... |
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Program any SPI Flash via J-Link and Flasher - regardless of CPU model
Hilden, Germany – June 9th, 2015 – The newly released J-Flash SPI software allows SEGGER’s in-circuit programmers and debug probes to support direct programming of SPI flashes.
Users of current models of J-Link PLUS, ULTRA+ and PRO, as well as Flasher ARM and PRO can employ J-Flash SPI to program serial (SPI) flashes, which are directly connected to the J-Link or Flash ... |
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