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JTAG - Hardware debugging
During development it can be a challenge to verify your just-received new prototype boards that are using high-density SMD or BGA devices. Just connecting testprobe is either impossible or very risky in creating short-circuits. Most microprocessors and FPGA however have build-in Boundary-scan testcells that can be reached via the JTAG-scan chain. We offer some economic yet powerful tools that allow to read out and pins,set signal levels and run Python testscripts. These tools are compatible with several popular JTAG-interfaces including the IAR / SEGGER J-LINK.
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HPE-JTAG From developers - for developers
Have you ever attempted to measure signals between two ball grid arrays and then noticed that you forgot to insert test pads? Has the price of JTAG tools kept y ou from using Boundary Scan Tests? With Hpe®_JTAG Gleichmann Electronics Research introduces a cost efficient JTAG tool allowing you to debug and test your PCBs and ICs. Hpe®_JTAG gives the design engineer full control over the log ... |
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